Launched in 2004, dmesgd aims to provide a user-submitted repository of searchable *BSD dmesgs. The dmesg(8) command displays the system message buffer's content, and during boot a copy is saved to /var/run/dmesg.boot. This buffer contains the operating system release, name and version, a list of devices identified, plus a whole host of other useful information. We hope others find this resource useful and further contribute to its growth. Contact us at [ admin at lists dot nycbug dot org ]. Note that this site is not a substitute for sending the dmesg directly to the respective project.
Date: 2012-12-02 17:58:12
From: ike
Description: kientzle freebsd-beaglebone (basically stock build)
processing avail regions: 80000000-90000000 -> 80000000-80200000 = 200000 80887000-90000000 -> 80887000-90000000 = f779000 fill in phys_avail: region: 0x80000000 - 0x80200000 (0x00200000) region: 0x80887000 - 0x90000000 (0x0f779000) KDB: debugger backends: ddb KDB: current backend: ddb Copyright (c) 1992-2012 The FreeBSD Project. Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 The Regents of the University of California. All rights reserved. FreeBSD is a registered trademark of The FreeBSD Foundation. FreeBSD 10.0-CURRENT #0 r241641: Fri Oct 19 10:59:27 EDT 2012 root@blackbook:/usr/obj/arm.armv6/usr/src-currrent/sys/BEAGLEBONE arm WARNING: WITNESS option enabled, expect reduced performance. CPU: Cortex A8-r3 rev 2 (Cortex-A core) Supported features: ARM_ISA THUMB2 JAZELLE THUMBEE ARMv4 Security_Ext WB disabled EABT branch prediction enabled LoUU:2 LoC:2 LoUIS:1 Cache level 1: 32KB/64B 4-way data cache WT WB Read-Alloc 32KB/64B 4-way instruction cache Read-Alloc Cache level 2: 256KB/64B 8-way unified cache WT WB Read-Alloc Write-Alloc real memory = 268435456 (256 MB) avail memory = 254795776 (242 MB) Texas Instruments AM3358 Processor, Revision ES1.0 simplebus0: <Flattened device tree simple bus> on fdtbus0 aintc0: <TI AINTC Interrupt Controller> mem 0xca6f1000-0xca6f1fff on simplebus0 aintc0: Revision 5.0 ti_scm0: <TI Control Module> mem 0xe4e10000-0xe4e11fff on simplebus0 setting internal 70 for I2C0_SDA setting internal 70 for I2C0_SCL setting internal 20 for gmii1_rxerr setting internal 0 for gmii1_txen setting internal 20 for gmii1_rxdv setting internal 0 for gmii1_txd3 setting internal 0 for gmii1_txd2 setting internal 0 for gmii1_txd1 setting internal 0 for gmii1_txd0 setting internal 20 for gmii1_txclk setting internal 20 for gmii1_rxclk setting internal 20 for gmii1_rxd3 setting internal 20 for gmii1_rxd2 setting internal 20 for gmii1_rxd1 setting internal 20 for gmii1_rxd0 setting internal 30 for mdio_data setting internal 10 for mdio_clk setting internal 30 for mmc0_cmd setting internal 30 for mmc0_clk setting internal 30 for mmc0_dat0 setting internal 30 for mmc0_dat1 setting internal 30 for mmc0_dat2 setting internal 30 for mmc0_dat3 am335x_prcm0: <AM335x Power and Clock Management> mem 0xe4e00000-0xe4e012ff on simplebus0 am335x_prcm0: Clocks: System 24.0 MHz, CPU 500 MHz am335x_dmtimer0: <AM335x DMTimer> mem 0xe4e05000-0xe4e05fff,0xe4e31000-0xe4e31fff,0xca6f2000-0xca6f2fff,0xca6f3000-0xca6f3fff,0xca6f4000-0xca6f4fff,0xca6f5000-0xca6f5fff,0xca6f6000-0xca6f6fff,0xca6f7000-0xca6f7fff irq 66,67,68,69,92,93,94,95 on simplebus0 Timecounter "AM335x Timecouter" frequency 24000000 Hz quality 1000 Event timer "AM335x Eventtimer0" frequency 24000000 Hz quality 1000 gpio0: <TI General Purpose I/O (GPIO)> mem 0xe4e07000-0xe4e07fff,0xca6f8000-0xca6f8fff,0xca6f9000-0xca6f9fff,0xca6fa000-0xca6fafff irq 17,19,21,23 on simplebus0 gpioc0: <GPIO controller> on gpio0 gpiobus0: <GPIO bus> on gpio0 uart0: <16750 or compatible> mem 0xe4e09000-0xe4e09fff irq 72 on simplebus0 uart0: console (115384,n,8,1) ti_edma30: <TI EDMA Controller> mem 0xca6fb000-0xca7fafff,0xca7fb000-0xca8fafff,0xca8fb000-0xca9fafff,0xca9fb000-0xcaafafff irq 12,13,14 on simplebus0 ti_edma30: EDMA revision 40014c00 ti_mmchs0: <TI MMC/SD/SDIO High Speed Interface> mem 0xcaafb000-0xcaafbfff irq 64 on simplebus0 mmc0: <MMC/SD bus> on ti_mmchs0 cpsw0: <3-port Switch Ethernet Subsystem> mem 0xcaafc000-0xcaafefff irq 40,41,42,43 on simplebus0 cpsw0: Version 1.12 (0) cpsw0: Ethernet address: [_MAC_XXXXXXXXXX] miibus0: <MII bus> on cpsw0 smscphy0: <SMC LAN8710A 10/100 interface> PHY 0 on miibus0 smscphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto iichb0: <TI I2C Controller> mem 0xe4e0b000-0xe4e0bfff irq 70 on simplebus0 iichb0: I2C revision 4.0 iicbus0: <OFW I2C bus> on iichb0 iic0: <I2C generic I/O> on iicbus0 am335x_pmic0: <TI TPS65217 Power Management IC> at addr 0x24 on iicbus0 Timecounters tick every 10.000 msec ti_mmchs_update_ios: TWL unimplemented mmcsd0: 3724MB <SDHC SA04G 1.0 SN 427796205 MFG 04/2012 by 2 TM> at mmc0 25.0MHz/4bit/1-block am335x_pmic0: TPS65217B ver 1.1 powered by USB WARNING: WITNESS option enabled, expect reduced performance. Trying to mount root from ufs:/dev/mmcsd0s2a [rw,noatime]... warning: no time-of-day clock registered, system time will not be set accurately cpsw_init_locked: start cpsw_ioctl: SIOCADDMULTI cpsw_ioctl: SIOCADDMULTI cpsw_ioctl: SIOCADDMULTI cpsw_ioctl: SIOCADDMULTI cpsw_ioctl: SIOCADDMULTI