Launched in 2004, dmesgd aims to provide a user-submitted repository of searchable *BSD dmesgs. The dmesg(8) command displays the system message buffer's content, and during boot a copy is saved to /var/run/dmesg.boot. This buffer contains the operating system release, name and version, a list of devices identified, plus a whole host of other useful information. We hope others find this resource useful and further contribute to its growth. Contact us at [ admin at lists dot nycbug dot org ]. Note that this site is not a substitute for sending the dmesg directly to the respective project.
Date: 2018-12-16 23:45:24
From: afresh1
Description: OpenBSD 6.4-current (GENERIC.MP) arm64 on Raspberry Pi 3 Model B Rev 1.2
OpenBSD 6.4-current (GENERIC.MP) #319: Sun Dec 16 10:17:14 MST 2018
[_EMAIL_XXXXXXXXXXXXXXXX]:/usr/src/sys/arch/arm64/compile/GENERIC.MP
real mem = 961400832 (916MB)
avail mem = 902893568 (861MB)
mainbus0 at root: Raspberry Pi 3 Model B Rev 1.2
cpu0 at mainbus0 mpidr 0: ARM Cortex-A53 r0p4
cpu0: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
cpu0: 512KB 64b/line 16-way L2 cache
efi0 at mainbus0: UEFI 2.7
efi0: Das U-Boot rev 0x0
simplefb0 at mainbus0: 656x416, 32bpp
wsdisplay0 at simplefb0 mux 1
wsdisplay0: screen 0-5 added (std, vt100 emulation)
simplebus0 at mainbus0: "soc"
bcmintc0 at simplebus0
bcmdog0 at simplebus0
bcmrng0 at simplebus0
pluart0 at simplebus0
bcmtemp0 at simplebus0
bcmaux0 at simplebus0
com0 at simplebus0: ns16550, no working fifo
com0: console
dwctwo0 at simplebus0
simplebus1 at mainbus0: "clocks"
agtimer0 at mainbus0: tick rate 19200 KHz
cpu1 at mainbus0 mpidr 1: ARM Cortex-A53 r0p4
cpu1: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
cpu1: 512KB 64b/line 16-way L2 cache
cpu2 at mainbus0 mpidr 2: ARM Cortex-A53 r0p4
cpu2: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
cpu2: 512KB 64b/line 16-way L2 cache
cpu3 at mainbus0 mpidr 3: ARM Cortex-A53 r0p4
cpu3: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
cpu3: 512KB 64b/line 16-way L2 cache
usb0 at dwctwo0: USB revision 2.0
uhub0 at usb0 configuration 1 interface 0 "Broadcom DWC2 root hub" rev 2.00/1.00 addr 1
uhub1 at uhub0 port 1 configuration 1 interface 0 "Standard Microsystems product 0x9514" rev 2.00/2.00 addr 2
smsc0 at uhub1 port 1 configuration 1 interface 0 "Standard Microsystems SMSC9512/14" rev 2.00/2.00 addr 3
smsc0: address [_MAC_XXXXXXXXXX]
ukphy0 at smsc0 phy 1: Generic IEEE 802.3u media interface, rev. 3: OUI 0x0001f0, model 0x000c
umass0 at uhub1 port 3 configuration 1 interface 0 "SanDisk Ultra Fit" rev 2.10/1.00 addr 4
umass0: using SCSI over Bulk-Only
scsibus0 at umass0: 2 targets, initiator 0
sd0 at scsibus0 targ 1 lun 0: <SanDisk, Ultra Fit, 1.00> SCSI4 0/direct removable serial.07815583250226100413
sd0: 14663MB, 512 bytes/sector, 30031250 sectors
vscsi0 at root
scsibus1 at vscsi0: 256 targets
softraid0 at root
scsibus2 at softraid0: 256 targets
bootfile: sd0a:/bsd
boot device: sd0
root on sd0a (32eca3907bcda1f2.a) swap on sd0b dump on sd0b
WARNING: CHECK AND RESET THE DATE!