Launched in 2004, dmesgd aims to provide a user-submitted repository of searchable *BSD dmesgs. The dmesg(8) command displays the system message buffer's content, and during boot a copy is saved to /var/run/dmesg.boot. This buffer contains the operating system release, name and version, a list of devices identified, plus a whole host of other useful information. We hope others find this resource useful and further contribute to its growth. Contact us at [ admin at lists dot nycbug dot org ].
Date: 2019-01-04 03:33:12
From: skibo
Description: RELEASE-12.0 on an Ultra-96
---<<BOOT>>---
Copyright (c) 1992-2018 The FreeBSD Project.
Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
The Regents of the University of California. All rights reserved.
FreeBSD is a registered trademark of The FreeBSD Foundation.
FreeBSD 12.0-RELEASE #1 r341741M: Thu Jan 3 18:47:16 PST 2019
skibo@ashbury:/usr/obj/usr/src/arm64.aarch64/sys/GENERIC arm64
FreeBSD clang version 6.0.1 (tags/RELEASE_601/final 335540) (based on LLVM 6.0.1)
VT: init without driver.
module_register: cannot register simplebus/xhci from kernel; already loaded from kernel
Module simplebus/xhci failed to register: 17
Starting CPU 1 (1)
Starting CPU 2 (2)
Starting CPU 3 (3)
FreeBSD/SMP: Multiprocessor System Detected: 4 CPUs
random: unblocking device.
random: entropy device external interface
MAP 78eca000 mode 2 pages 1
MAP 7ff90000 mode 2 pages 1
kbd0 at kbdmux0
ofwbus0: <Open Firmware Device Tree>
simplebus0: <Flattened device tree simple bus> on ofwbus0
simplebus1: <Flattened device tree simple bus> on ofwbus0
psci0: <ARM Power State Co-ordination Interface Driver> on ofwbus0
gic0: <ARM Generic Interrupt Controller> mem 0xf9010000-0xf901ffff,0xf9020000-0xf903ffff,0xf9040000-0xf905ffff,0xf9060000-0xf907ffff on simplebus0
gic0: pn 0x2, arch 0x2, rev 0x1, implementer 0x43b irqs 192
generic_timer0: <ARMv8 Generic Timer> irq 4,5,6,7 on simplebus0
Timecounter "ARM MPCore Timecounter" frequency 99999999 Hz quality 1000
Event timer "ARM MPCore Eventtimer" frequency 99999999 Hz quality 1000
cpulist0: <Open Firmware CPU Group> on ofwbus0
cpu0: <Open Firmware CPU> on cpulist0
cpu1: <Open Firmware CPU> on cpulist0
cpu2: <Open Firmware CPU> on cpulist0
cpu3: <Open Firmware CPU> on cpulist0
pmu0: <Performance Monitoring Unit> irq 0,1,2,3 on ofwbus0
uart0: <Cadence UART> mem 0xff000000-0xff000fff irq 8 on simplebus1
uart1: <Cadence UART> mem 0xff010000-0xff010fff irq 9 on simplebus1
uart1: console (115200,n,8,1)
sdhci_fdt0: <Zynq-7000 generic fdt SDHCI controller> mem 0xff160000-0xff160fff irq 19 on simplebus1
sdhci_fdt0: 1 slot(s) allocated
mmc0: <MMC/SD bus> on sdhci_fdt0
xhci0: <Synopsys DesignWare USB 3.0 controller> mem 0xfe300000-0xfe33ffff irq 26,27,28 on simplebus1
xhci0: 64 bytes context size, 32-bit DMA
usbus0 on xhci0
cryptosoft0: <software crypto>
Timecounters tick every 1.000 msec
usbus0: 5.0Gbps Super Speed USB v3.0
ugen0.1: <Synopsys XHCI root HUB> at usbus0
uhub0: <Synopsys XHCI root HUB, class 9/0, rev 3.00/1.00, addr 1> on usbus0
mmcsd0: 8GB <SDHC SU08G 8.0 SN 0623235C MFG 03/2013 by 3 SD> at mmc0 50.0MHz/4bit/65535-block
Release APs...Trying to mount root from ufs:/dev/mmcsd0s2a [rw,noatime]...
done
CPU 0: ARM Cortex-A53 r0p4 affinity: 0
Instruction Set Attributes 0 = <AES+PMULL,SHA1,SHA2,CRC32>
Instruction Set Attributes 1 = <>
Processor Features 0 = <AdvSIMD,Float,EL3 32,EL2 32,EL1 32,EL0 32>
Processor Features 1 = <0>
Memory Model Features 0 = <4k Granule,64k Granule,MixedEndian,S/NS Mem,16bit ASID,1TB PA>
Memory Model Features 1 = <>
Memory Model Features 2 = <32b CCIDX,48b VA>
Debug Features 0 = <2 CTX Breakpoints,4 Watchpoints,6 Breakpoints,PMUv3,Debug v8>
Debug Features 1 = <0>
Auxiliary Features 0 = <0>
Auxiliary Features 1 = <0>
CPU 1: ARM Cortex-A53 r0p4 affinity: 1
CPU 2: ARM Cortex-A53 r0p4 affinity: 2
CPU 3: ARM Cortex-A53 r0p4 affinity: 3
Warning: no time-of-day clock registered, system time will not be set accurately
uhub0: 2 ports with 2 removable, self powered
ugen0.2: <Microchip Tech USB2744> at usbus0
uhub1 on uhub0
uhub1: <Microchip Tech USB2744, class 9/0, rev 2.10/2.05, addr 1> on usbus0
uhub1: MTT enabled
lo0: link state changed to UP
uhub1: 4 ports with 3 removable, self powered
ugen0.3: <Apple Inc. Apple USB Ethernet Adapter> at usbus0
axe0 on uhub1
axe0: <0> on usbus0
miibus0: <MII bus> on axe0
ukphy0: <Generic IEEE 802.3u media interface> PHY 16 on miibus0
ukphy0: none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
ue0: <USB Ethernet> on axe0
ue0: Ethernet address: [_MAC_XXXXXXXXXX]
ugen0.4: <Memorex TD Classic 003C> at usbus0
umass0 on uhub1
umass0: <Memorex TD Classic 003C, class 0/0, rev 2.00/1.00, addr 3> on usbus0
da0 at umass-sim0 bus 0 scbus0 target 0 lun 0
da0: <Memorex TD Classic 003C 5.00> Removable Direct Access SCSI device
da0: [_SERIAL_NUMBER_XXXXXXXXXXXXX]
da0: 40.000MB/s transfers
da0: 984MB (2015232 512 byte sectors)
da0: quirks=0x2<NO_6_BYTE>
ugen0.5: <Microchip Tech Hub Controller> at usbus0
ue0: link state changed to UP
ugen0.6: <Microchip Tech USB5744> at usbus0
uhub2 on uhub0
uhub2: <Microchip Tech USB5744, class 9/0, rev 3.10/2.05, addr 5> on usbus0
ue0: link state changed to DOWN
uhub2: 3 ports with 3 removable, self powered
ue0: link state changed to UP