Launched in 2004, dmesgd aims to provide a user-submitted repository of searchable *BSD dmesgs. The dmesg(8) command displays the system message buffer's content, and during boot a copy is saved to /var/run/dmesg.boot. This buffer contains the operating system release, name and version, a list of devices identified, plus a whole host of other useful information. We hope others find this resource useful and further contribute to its growth. Contact us at [ admin at lists dot nycbug dot org ]. Note that this site is not a substitute for sending the dmesg directly to the respective project.
Date: 2026-10-01 20:37:22
From: getz
Description: FreeBSD 16.0-current/arm64 on Trenz Electronic TE0820 (Zynq UltraScale+ ZU2EG) + TE0701 carrier
---<<BOOT>>---
GDB: debug ports: uart
GDB: current port: uart
KDB: debugger backends: ddb gdb
KDB: current backend: ddb
Copyright (c) 1992-2026 The FreeBSD Project.
Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
The Regents of the University of California. All rights reserved.
FreeBSD is a registered trademark of The FreeBSD Foundation.
FreeBSD 16.0-CURRENT #2 te0820-bringup-n284810-128663a9fb23: Thu Oct 1 13:04:38 CEST 2026
FreeBSD clang version 19.1.7 (https://github.com/llvm/llvm-project.git llvmorg-19.1.7-0-gcd708029e0b2)
WARNING: WITNESS option enabled, expect reduced performance.
VT: init without driver.
real memory = 2145906688 (2046 MB)
avail memory = 2074148864 (1978 MB)
Starting CPU 1 (1)
Starting CPU 2 (2)
Starting CPU 3 (3)
FreeBSD/SMP: Multiprocessor System Detected: 4 CPUs
random: unblocking device.
random: entropy device external interface
kbd0 at kbdmux0
ofwbus0: <Open Firmware Device Tree>
ofw_firmware0: <OFW Firmware Group> on ofwbus0
simplebus0: <Flattened device tree simple bus> on ofwbus0
zynqmp_firmware0: <ZynqMP Firmware> on ofw_firmware0
debug0: <Coresight CPU Debug> mem 0xfec10000-0xfec10fff on simplebus0
debug1: <Coresight CPU Debug> mem 0xfed10000-0xfed10fff on simplebus0
debug2: <Coresight CPU Debug> mem 0xfee10000-0xfee10fff on simplebus0
debug3: <Coresight CPU Debug> mem 0xfef10000-0xfef10fff on simplebus0
zynqmp_reset0: <ZynqMP Reset Controller> on zynqmp_firmware0
zynqmp_clock0: <ZynqMP Clock Controller> on zynqmp_firmware0
psci0: <ARM Power State Co-ordination Interface Driver> on ofwbus0
smccc0: <ARM SMCCC v1.4> on psci0
cpulist0: <Open Firmware CPU Group> on ofwbus0
cpu0: <Open Firmware CPU> on cpulist0
gic0: <ARM Generic Interrupt Controller> mem 0xf9010000-0xf901ffff,0xf9020000-0xf903ffff,0xf9040000-0xf905ffff,0xf9060000-0xf907ffff irq 19 on simplebus0
gic0: pn 0x2, arch 0x2, rev 0x1, implementer 0x43b irqs 192
gpio0: <ZynqMP GPIO Controller> mem 0xff0a0000-0xff0a0fff irq 44 on simplebus0
gpiobus0: <GPIO bus> on gpio0
generic_timer0: <ARMv8 Generic Timer> irq 5,6,7,8 on ofwbus0
Timecounter "ARM MPCore Timecounter" frequency 33333332 Hz quality 1000
Event timer "ARM MPCore Eventtimer" frequency 33333332 Hz quality 1000
smbios0: <System Management BIOS>
smbios0: Entry point: v3 (64-bit), Version: 3.7
cpufreq_dt0: <Generic cpufreq driver> on cpu0
cpufreq0: <CPU frequency control> on cpu0
pmu0: <Performance Monitoring Unit> irq 1,2,3,4 on ofwbus0
zynqmp_fpga0: <ZynqMP FPGA manager> on zynqmp_firmware0
cgem0: <Cadence CGEM Gigabit Ethernet Interface> mem 0xff0e0000-0xff0e0fff irq 42,43 on simplebus0
miibus0: <MII bus> on cgem0
mv88e151x0: <Marvell 88E1512 Gigabit PHY> PHY 1 on miibus0
mv88e151x0: none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT-FDX, 1000baseT-FDX-master, 1000baseSX-FDX, auto
cgem0: Ethernet address: [_MAC_XXXXXXXXXX]
gpioc0: <GPIO controller> at pins 0-174 on gpiobus0
cdnc_i2c0: <Cadence I2C Controller> mem 0xff020000-0xff020fff irq 45 on simplebus0
cdnc_i2c1: <Cadence I2C Controller> mem 0xff030000-0xff030fff irq 46 on simplebus0
zynqmp_gqspi0: <ZynqMP Generic Quad-SPI controller> mem 0xff0f0000-0xff0f0fff,0xc0000000-0xc7ffffff irq 53 on simplebus0
sdhci_xilinx0: <ZynqMP generic fdt SDHCI controller> mem 0xff160000-0xff160fff irq 57 on simplebus0
sdhci_xilinx0: 1 slot(s) allocated
mmc0: <MMC/SD bus> on sdhci_xilinx0
sdhci_xilinx1: <ZynqMP generic fdt SDHCI controller> mem 0xff170000-0xff170fff irq 58 on simplebus0
sdhci_xilinx1: 1 slot(s) allocated
mmc1: <MMC/SD bus> on sdhci_xilinx1
uart0: <Cadence UART> mem 0xff000000-0xff000fff irq 90 on simplebus0
uart0: console (-1,n,8,1)
xlnx_dwc30: <Xilinx ZYNQMP DWC3> mem 0xff9d0000-0xff9d00ff on simplebus0
snps_dwc3_fdt0: <Synopsys Designware DWC3> mem 0xfe200000-0xfe23ffff irq 98,99,100,101 on xlnx_dwc30
snps_dwc3_fdt0: 64 bytes context size, 32-bit DMA
snps_dwc3_fdt0: xECP capabilities <LEGACY,PROTO,PROTO,DEBUG>
usbus0: trying to attach
usbus0 on snps_dwc3_fdt0
armv8crypto0: <AES-CBC,AES-XTS,AES-GCM>
Timecounters tick every 1.000 msec
iicbus0: <OFW I2C bus> on cdnc_i2c0
iic0: <I2C generic I/O> on iicbus0
iicbus1: <OFW I2C bus> on cdnc_i2c1
iic1: <I2C generic I/O> on iicbus1
spibus0: <OFW SPI bus> on zynqmp_gqspi0
mx25l0: <M25Pxx Flash Family> at cs 0 mode 0 on spibus0
usbus0: 5.0Gbps Super Speed USB v3.0
mx25l0: device type mt25qu512, size 65536K in 1024 sectors of 64K, erase size 4K
ugen0.1: <Synopsys XHCI root HUB> at usbus0
uhub0 on usbus0
uhub0: <Synopsys XHCI root HUB, class 9/0, rev 3.00/1.00, addr 1> on usbus0
mmcsd0: 8GB <MMCHC DG4008 0.1 SN 4ECA612C MFG 09/2023 by 69 0x0000> at mmc0 50.0MHz/8bit/65535-block
mmcsd0boot0: 4MB partition 1 at mmcsd0
mmcsd0boot1: 4MB partition 2 at mmcsd0
mmcsd0rpmb: 4MB partition 3 at mmcsd0
mmcsd1: 256GB <SDHC SD256 8.5 SN E61B4ED1 MFG 11/2023 by 3 SD> at mmc1 50.0MHz/4bit/65535-block
CPU 0: ARM Cortex-A53 r0p4 affinity: 0
Cache Type = <64 byte CWG,64 byte ERG,64 byte D-cacheline,VIPT I-cache,64 byte I-cacheline>
Trying to mount root from ufs:/dev/ufs/rootfs [rw,noatime]...
Instruction Set Attributes 0 = <CRC32,SHA2,SHA1,AES+PMULL>
Instruction Set Attributes 1 = <>
Instruction Set Attributes 2 = <>
Processor Features 0 = <AdvSIMD,FP,EL3 32,EL2 32,EL1 32,EL0 32>
Processor Features 1 = <MTE_frac>
Processor Features 2 = <>
Memory Model Features 0 = <TGran4,TGran64,SNSMem,BigEnd,16bit ASID,1TB PA>
Memory Model Features 1 = <8bit VMID>
Memory Model Features 2 = <32bit CCIDX,48bit VA>
Memory Model Features 3 = <>
Memory Model Features 4 = <>
Debug Features 0 = <DoubleLock,2 CTX BKPTs,4 Watchpoints,6 Breakpoints,PMUv3,Debugv8>
Debug Features 1 = <>
Auxiliary Features 0 = <>
Auxiliary Features 1 = <>
AArch32 Instruction Set Attributes 5 = <CRC32,SHA2,SHA1,AES+VMULL,SEVL>
AArch32 Media and VFP Features 0 = <FPRound,FPSqrt,FPDivide,DP VFPv3+v4,SP VFPv3+v4,AdvSIMD>
AArch32 Media and VFP Features 1 = <SIMDFMAC,FPHP DP Conv,SIMDHP SP Conv,SIMDSP,SIMDInt,SIMDLS,FPDNaN,FPFtZ>
CPU 1: ARM Cortex-A53 r0p4 affinity: 1
CPU 2: ARM Cortex-A53 r0p4 affinity: 2
CPU 3: ARM Cortex-A53 r0p4 affinity: 3
gic0: using for IPIs
Release APs...done
WARNING: WITNESS option enabled, expect reduced performance.
uhub0: 2 ports with 2 removable, self powered
WARNING: / was not properly dismounted
Warning: no time-of-day clock registered, system time will not be set accurately
cgem0: link state changed to DOWN
lo0: link state changed to UP