Launched in 2004, dmesgd aims to provide a user-submitted repository of searchable *BSD dmesgs. The dmesg(8) command displays the system message buffer's content, and during boot a copy is saved to /var/run/dmesg.boot. This buffer contains the operating system release, name and version, a list of devices identified, plus a whole host of other useful information. We hope others find this resource useful and further contribute to its growth. Contact us at [ admin at lists dot nycbug dot org ].


Date: 2012-11-13 21:25:49
From: cantona
Description: FreeBSD 10.0-CURRENT on Raspberry PI
KDB: debugger backends: ddb
KDB: current backend: ddb
Copyright (c) 1992-2012 The FreeBSD Project.
Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
        The Regents of the University of California. All rights reserved.
FreeBSD is a registered trademark of The FreeBSD Foundation.
FreeBSD 10.0-CURRENT #5 r242829: Sat Nov 10 01:04:00 HKT 2012
    [_EMAIL_XXXXXXXXXX]:/usr/obj-rpi/arm.arm/usr/src/sys/RPI-Bsc arm
CPU: Sheeva 88SV581x rev 7 (Marvell core)
 Supported features: ARM_ISA THUMB2 JAZELLE ARMv4 Security_Ext
 WB enabled LABT branch prediction enabled
  16KB/32B 4-way instruction cache
  16KB/32B 4-way write-back-locking-C data cache
real memory  = 134217728 (128 MB)
avail memory = 125943808 (120 MB)
kbd0 at kbdmux0
simplebus0: <Flattened device tree simple bus> mem 0xf2000000-0xf2ffffff on fdtbus0
intc0: <BCM2835 Interrupt Controller> mem 0xf200b200-0xf200b3ff on simplebus0
systimer0: <BCM2835 System Timer> mem 0xf2003000-0xf2003fff irq 8,9,10,11 on simplebus0
Event timer "BCM2835 Event Timer 3" frequency 1000000 Hz quality 1000
Timecounter "BCM2835 Timecouter" frequency 1000000 Hz quality 1000
sdhci_bcm0: <Broadcom 2708 SDHCI controller> mem 0xf2300000-0xf23000ff irq 70 on simplebus0
mmc0: <MMC/SD bus> on sdhci_bcm0
mbox0: <BCM2835 VideoCore Mailbox> mem 0xf200b880-0xf200b8bf irq 1 on simplebus0
mbox0: [GIANT-LOCKED]
bcmwd0: <BCM2708/2835 Watchdog> mem 0xf210001c-0xf2100027 on simplebus0
uart0: <PrimeCell UART (PL011)> mem 0xf2201000-0xf2201fff irq 65 on simplebus0
dwcotg0: <DWC OTG 2.0 integrated USB controller> mem 0xf2980000-0xf299ffff irq 17 on simplebus0
usbus0 on dwcotg0
fb0: <BCM2835 framebuffer device> on simplebus0
sc0: Unknown <16 virtual consoles, flags=0x300>
Timecounters tick every 10.000 msec
usbus0: 480Mbps High Speed USB v2.0
ugen0.1: <DWCOTG> at usbus0
uhub0: <DWCOTG OTG Root HUB, class 9/0, rev 2.00/1.00, addr 1> on usbus0
uhub0: 1 port with 1 removable, self powered
mmcsd0: 1886MB <SD SD02G 8.0 SN 81716285 MFG 03/2010 by 3 SD> at mmc0 25.0MHz/4bit/65535-block
fb0: 640x480(640x480@0,0) 24bpp
fb0: pitch 1920, base 0x49385000, screen_size 921600
Root mount waiting for: usbus0
ugen0.2: <vendor 0x0424> at usbus0
uhub1: <vendor 0x0424 product 0x9512, class 9/0, rev 2.00/2.00, addr 2> on usbus0
uhub1: MTT enabled
Root mount waiting for: usbus0
uhub1: 3 ports with 2 removable, self powered
Root mount waiting for: usbus0
ugen0.3: <vendor 0x0424> at usbus0
smsc0: <vendor 0x0424 product 0xec00, rev 2.00/2.00, addr 3> on usbus0
smsc0: chip 0xec00, rev. 0002
miibus0: <MII bus> on smsc0
ukphy0: <Generic IEEE 802.3u media interface> PHY 1 on miibus0
ukphy0:  none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
ue0: <USB Ethernet> on smsc0
ue0: Ethernet address: [_MAC_XXXXXXXXXX]
ugen0.4: <vendor 0x0bda> at usbus0
Root mount waiting for: usbus0
ugen0.5: <vendor 0x1a40> at usbus0
uhub2: <vendor 0x1a40 USB 2.0 Hub MTT, class 9/0, rev 2.00/1.00, addr 5> on usbus0
uhub2: MTT enabled
Root mount waiting for: usbus0
uhub2: 7 ports with 7 removable, self powered
Root mount waiting for: usbus0
ugen0.6: <vendor 0x1997> at usbus0
ukbd0: <vendor 0x1997 product 0x1221, class 0/0, rev 2.00/2.01, addr 6> on usbus0
kbd1 at ukbd0
ums0: <vendor 0x1997 product 0x1221, class 0/0, rev 2.00/2.01, addr 6> on usbus0
ums0: 5 buttons and [XYZ] coordinates ID=1
Root mount waiting for: usbus0
ugen0.7: <vendor 0x0a12> at usbus0
Trying to mount root from ufs:mmcsd0s2 []...
warning: no time-of-day clock registered, system time will not be set accurately
smsc0: chip 0xec00, rev. 0002