Launched in 2004, dmesgd aims to provide a user-submitted repository of searchable *BSD dmesgs. The dmesg(8) command displays the system message buffer's content, and during boot a copy is saved to /var/run/dmesg.boot. This buffer contains the operating system release, name and version, a list of devices identified, plus a whole host of other useful information. We hope others find this resource useful and further contribute to its growth. Contact us at [ admin at lists dot nycbug dot org ].

Date: 2019-02-24 13:18:08
From: Justin Yang
Description: pine64 LTS with edimax ew-7811un N150 Nano usb wifi adapter
OpenBSD 6.4-current (GENERIC.MP) #2: Mon Feb 18 12:47:47 MST 2019
    xxx@xxx.xxx:/usr/src/sys/arch/arm64/compile/GENERIC.MP
real mem  = 2018205696 (1924MB)
avail mem = 1925681152 (1836MB)
mainbus0 at root: Pine64 LTS
cpu0 at mainbus0 mpidr 0: ARM Cortex-A53 r0p4
cpu0: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
cpu0: 512KB 64b/line 16-way L2 cache
efi0 at mainbus0: UEFI 2.7
efi0: Das U-Boot rev 0x20190100
apm0 at mainbus0
psci0 at mainbus0: PSCI 1.1, SMCCC 1.1
agtimer0 at mainbus0: tick rate 24000 KHz
simplebus0 at mainbus0: "soc"
sxiccmu0 at simplebus0
sxipio0 at simplebus0: 103 pins
ampintc0 at simplebus0 nirq 224, ncpu 4 ipi: 0, 1: "interrupt-controller"
sxiccmu1 at simplebus0
sxipio1 at simplebus0: 13 pins
sxirsb0 at simplebus0
axppmic0 at sxirsb0 addr 0x3a3: AXP803
"de2" at simplebus0 not configured
"syscon" at simplebus0 not configured
"dma-controller" at simplebus0 not configured
"lcd-controller" at simplebus0 not configured
"lcd-controller" at simplebus0 not configured
sximmc0 at simplebus0
sdmmc0 at sximmc0: 4-bit, sd high-speed, mmc high-speed, dma
sximmc1 at simplebus0
sdmmc1 at sximmc1: 8-bit, sd high-speed, mmc high-speed, dma
"eeprom" at simplebus0 not configured
"usb" at simplebus0 not configured
"phy" at simplebus0 not configured
ehci0 at simplebus0
usb0 at ehci0: USB revision 2.0
uhub0 at usb0 configuration 1 interface 0 "Generic EHCI root hub" rev 2.00/1.00 addr 1
ohci0 at simplebus0: version 1.0
ehci1 at simplebus0
usb1 at ehci1: USB revision 2.0
uhub1 at usb1 configuration 1 interface 0 "Generic EHCI root hub" rev 2.00/1.00 addr 1
ohci1 at simplebus0: version 1.0
"clock" at simplebus0 not configured
"pinctrl" at simplebus0 not configured
com0 at simplebus0: ns16550, no working fifo
com0: console
"spi" at simplebus0 not configured
dwxe0 at simplebus0: address xx:xx:xx:xx:xx:xx
rgephy0 at dwxe0 phy 1: RTL8169S/8110S/8211 PHY, rev. 5
"interrupt-controller" at simplebus0 not configured
"hdmi" at simplebus0 not configured
"hdmi-phy" at simplebus0 not configured
sxirtc0 at simplebus0
"interrupt-controller" at simplebus0 not configured
"clock" at simplebus0 not configured
"pinctrl" at simplebus0 not configured
"rsb" at simplebus0 not configured
"watchdog" at simplebus0 not configured
gpio0 at sxipio0: 32 pins
gpio1 at sxipio0: 32 pins
gpio2 at sxipio0: 32 pins
gpio3 at sxipio0: 32 pins
gpio4 at sxipio0: 32 pins
gpio5 at sxipio0: 32 pins
gpio6 at sxipio0: 32 pins
gpio7 at sxipio0: 32 pins
gpio8 at sxipio1: 32 pins
usb2 at ohci0: USB revision 1.0
uhub2 at usb2 configuration 1 interface 0 "Generic OHCI root hub" rev 1.00/1.00 addr 1
usb3 at ohci1: USB revision 1.0
uhub3 at usb3 configuration 1 interface 0 "Generic OHCI root hub" rev 1.00/1.00 addr 1
cpu1 at mainbus0 mpidr 1: ARM Cortex-A53 r0p4
cpu1: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
cpu1: 512KB 64b/line 16-way L2 cache
cpu2 at mainbus0 mpidr 2: ARM Cortex-A53 r0p4
cpu2: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
cpu2: 512KB 64b/line 16-way L2 cache
cpu3 at mainbus0 mpidr 3: ARM Cortex-A53 r0p4
cpu3: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
cpu3: 512KB 64b/line 16-way L2 cache
sdmmc1: can't enable card
scsibus0 at sdmmc0: 2 targets, initiator 0
sd0 at scsibus0 targ 1 lun 0: <SD/MMC, SC64G, 0080> SCSI2 0/direct removable
sd0: 60906MB, 512 bytes/sector, 124735488 sectors
urtwn0 at uhub1 port 1 configuration 1 interface 0 "Realtek 802.11n WLAN Adapter" rev 2.00/2.00 addr 2
urtwn0: MAC/BB RTL8188CUS, RF 6052 1T1R, address xx:xx:xx:xx:xx:xx
vscsi0 at root
scsibus1 at vscsi0: 256 targets
softraid0 at root
scsibus2 at softraid0: 256 targets
bootfile: sd0a:/bsd
boot device: sd0
root on sd0a (9c93c81cfae3b6ba.a) swap on sd0b dump on sd0b
WARNING: preposterous clock chip time
WARNING: CHECK AND RESET THE DATE!