Launched in 2004, dmesgd aims to provide a user-submitted repository of searchable *BSD dmesgs. The dmesg(8) command displays the system message buffer's content, and during boot a copy is saved to /var/run/dmesg.boot. This buffer contains the operating system release, name and version, a list of devices identified, plus a whole host of other useful information. We hope others find this resource useful and further contribute to its growth. Contact us at [ admin at lists dot nycbug dot org ]. Note that this site is not a substitute for sending the dmesg directly to the respective project.


Date: 2024-04-12 06:48:16
From: yamori813
Description: OPENRDBASE 10.0
[ 16591.138259] turning off swap...[   1.0000000] Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
[     1.000000]     2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013,
[     1.000000]     2014, 2015, 2016, 2017, 2018, 2019, 2020, 2021, 2022, 2023,
[     1.000000]     2024
[     1.000000]     The NetBSD Foundation, Inc.  All rights reserved.
[     1.000000] Copyright (c) 1982, 1986, 1989, 1991, 1993
[     1.000000]     The Regents of the University of California.  All rights reserved.

[     1.000000] NetBSD 10.0 (OPENRDBASE) #0: Fri Apr 12 15:38:24 JST 2024
[     1.000000]         hiroki@netbsd2:/usr/home/hiroki/netbsd-src/sys/arch/evbarm/compile/obj/OPENRDBASE
[     1.000000] total memory = 512 MB
[     1.000000] avail memory = 497 MB
[     1.000000] timecounter: Timecounters tick every 10.000 msec
[     1.000000] mainbus0 (root)
[     1.000000] cpu0 at mainbus0 core 0: Sheeva 88SV131 rev 1 (ARM9E-S V5TE core)
[     1.000000] cpu0: DC enabled IC enabled WB enabled LABT branch prediction enabled
[     1.000000] cpu0: L1 16KB/32B 4-way (128 set) VIVT Instruction cache
[     1.000000] cpu0: L1 16KB/32B 4-way (128 set) write-back-locking-C VIVT Data cache
[     1.000000] mvsoc0 at mainbus0: Marvell 88F6281 Rev. A1  Kirkwood
[     1.000000] mvsoc0: CPU Clock 1200.000 MHz  SysClock 400.000 MHz  TClock 200.000 MHz
[     1.000000] mvsoctmr0 at mvsoc0 unit 0 offset 0x20300-0x203ff irq 65: Marvell SoC Timer
[     1.000000] mvsocgpp0 at mvsoc0 unit 0 offset 0x10100-0x101ff irq 35: Marvell SoC General Purpose I/O Port Interface
[     1.000000] mvsocgpp0: 50 gpio pins
[     1.000000] mvsocgpp0: interrupts 96..103, intr 35
[     1.000000] mvsocgpp0: interrupts 104..111, intr 36
[     1.000000] mvsocgpp0: interrupts 112..119, intr 37
[     1.000000] mvsocgpp0: interrupts 120..127, intr 38
[     1.000000] mvsocgpp0: interrupts 128..135, intr 39
[     1.000000] mvsocgpp0: interrupts 136..143, intr 40
[     1.000000] mvsocgpp0: interrupts 144..151, intr 41
[     1.000000] mvsocgpp0:   Data Out:                  0x00000000
[     1.000000] mvsocgpp0:   Data Out Enable Control:   0xefffffff
[     1.000000] mvsocgpp0:   Data Blink Enable:         0x00000000
[     1.000000] mvsocgpp0:   Data In Polarity:          0x00000000
[     1.000000] mvsocgpp0:   Data In:                   0x00000080
[     1.000000] mvsocgpp0:   Interrupt Cause:           0x00000000
[     1.000000] mvsocgpp0:   Interrupt Mask:            0x00000000
[     1.000000] mvsocgpp0:   Interrupt Level Mask:      0x00000000
[     1.000000] mvsocgpp0:   High Data Out:             0x00000004
[     1.000000] mvsocgpp0:   High Data Out Enable Ctrl: 0xfffffffb
[     1.000000] mvsocgpp0:   High Blink Enable:         0x00000000
[     1.000000] mvsocgpp0:   High Data In Polarity:     0x00000000
[     1.000000] mvsocgpp0:   High Data In:              0x00000004
[     1.000000] mvsocgpp0:   High Interrupt Cause:      0x00000000
[     1.000000] mvsocgpp0:   High Interrupt Mask:       0x00000000
[     1.000000] mvsocgpp0:   High Interrupt Level Mask: 0x00000000
[     1.000000] gpio0 at mvsocgpp0: 50 pins
[     1.000000] mvsocrtc0 at mvsoc0 unit 0 offset 0x10300-0x10317: Marvell SoC Real Time Clock
[     1.000000] com0 at mvsoc0 unit 0 offset 0x12000-0x1201f irq 33: ns16550a, 16-byte FIFO
[     1.000000] com0: console
[     1.000000] com1 at mvsoc0 unit 1 offset 0x12100-0x1211f irq 34: ns16550a, 16-byte FIFO
[     1.000000] ehci0 at mvsoc0 unit 0 offset 0x50000-0x50fff irq 19: Marvell USB 2.0 Interface
[     1.000000] ehci0: EHCI version 1.0
[     1.000000] usb0 at ehci0: USB revision 2.0
[     1.000000] gtidmac0 at mvsoc0 unit 0 offset 0x60000-0x60fff: Marvell IDMA Controller/XOR Engine
[     1.000000] gtidmac0: XOR Engine 4 channels, intr 5, 6, 7, 8
[     1.000000] gttwsi0 at mvsoc0 unit 0 offset 0x11000-0x110ff irq 29: Marvell TWSI controller
[     1.000000] iic0 at gttwsi0: I2C bus
[     1.000000] mvcesa0 at mvsoc0 unit 0 offset 0x3d000-0x3dfff irq 22: Marvell Cryptographic Engines and Security Accelerator
[     1.000000] mvgbec0 at mvsoc0 unit 0 offset 0x70000-0x73fff: Marvell Gigabit Ethernet Controller
[     1.000000] mvgbe0 at mvgbec0 port 0 irq 11
[     1.000000] mvgbe0: Ethernet address [_MAC_XXXXXXXXXX]
[     1.000000] makphy0 at mvgbe0 phy 8: Marvell 88E1116R Gigabit PHY, rev. 0
[     1.000000] makphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-FDX, auto
[     1.000000] mvgbec1 at mvsoc0 unit 1 offset 0x74000-0x77fff: Marvell Gigabit Ethernet Controller
[     1.000000] mvgbe at mvgbec1 port 0 not configured
[     1.000000] mvpex at mvsoc0 unit 0 not configured
[     1.000000] mvsata0 at mvsoc0 unit 0 offset 0x80000-0x87fff irq 21: Marvell Serial-ATA Host Controller (SATAHC)
[     1.000000] mvsata0: GenIIe, 1hc, 2port/hc
[     1.000000] atabus0 at mvsata0 channel 0
[     1.000000] atabus1 at mvsata0 channel 1
[     1.000000] mvsdio0 at mvsoc0 unit 0 offset 0x90000-0x9ffff irq 28: Marvell Secure Digital Input/Output Interface
[     1.000000] sdmmc0 at mvsdio0
[     1.000000] timecounter: Timecounter "mvsoctmr0" frequency 200000000 Hz quality 100
[     1.000003] timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0
[     1.000003] WARNING: system needs entropy for security; see entropy(7)
[     1.019974] uhub0 at usb0: NetBSD (0x0000) EHCI root hub (0x0000), class 9/0, rev 2.00/1.00, addr 1
[     1.019974] uhub0: 1 port with 1 removable, self powered
[     1.099961] mvsata0 port 1: device present, speed: 3.0Gb/s
[     2.049966] uhub1 at uhub0 port 1: vendor 05e3 (0x05e3) USB2.0 Hub (0x0610), class 9/0, rev 2.00/77.32, addr 2
[     2.049966] uhub1: multiple transaction translators
[     2.049966] uhub1: 4 ports with 3 removable, self powered
[     2.109964] wd0 at atabus1 drive 0
[     2.109964] wd0: <WDC WD2500AAKX-193CA0>
[     2.109964] wd0: drive supports 16-sector PIO transfers, LBA48 addressing
[     2.109964] wd0: 232 GB, 484521 cyl, 16 head, 63 sec, 512 bytes/sect x 488397168 sectors
[     2.169962] wd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 6 (Ultra/133), NCQ (32 tags) w/PRIO
[     2.169962] wd0(mvsata0:1:0): using PIO mode 4, Ultra-DMA mode 6 (Ultra/133) (using DMA), NCQ (31 tags) w/PRIO
[     2.919965] uhub2 at uhub1 port 1: vendor 05e3 (0x05e3) USB2.0 Hub (0x0610), class 9/0, rev 2.00/77.32, addr 3
[     2.919965] uhub2: multiple transaction translators
[     2.919965] uhub2: 4 ports with 4 removable, self powered
[     3.269962] boot device: <unknown>
[     3.269962] root on wd0a dumps on wd0b
[     3.309963] kern.module.path=/stand/evbarm/10.0/modules
[     4.089977] entropy: best effort
[     5.159978] entropy: ready