Launched in 2004, dmesgd aims to provide a user-submitted repository of searchable *BSD dmesgs. The dmesg(8) command displays the system message buffer's content, and during boot a copy is saved to /var/run/dmesg.boot. This buffer contains the operating system release, name and version, a list of devices identified, plus a whole host of other useful information. We hope others find this resource useful and further contribute to its growth. Contact us at [ admin at lists dot nycbug dot org ]. Note that this site is not a substitute for sending the dmesg directly to the respective project.
Date: 2025-10-16 11:30:09
From: rxg
Description: NetBSD/evbarm 11.99.3 on TI OMAP4 PandaBoard-ES
[ 1.000000] NetBSD 11.99.3 (GENERIC) #3: Thu Oct 16 17:56:07 CST 2025 [ 1.000000] rxg@picohive:/usr/builds/obj.earmv7hf/sys/arch/evbarm/compile/GENERIC [ 1.000000] total memory = 1024 MB [ 1.000000] avail memory = 868 MB [ 1.000000] timecounter: Timecounters tick every 10.000 msec [ 1.000000] Kernelized RAIDframe activated [ 1.000000] armfdt0 (root) [ 1.000000] simplebus0 at armfdt0: TI OMAP4 PandaBoard-ES [ 1.000000] simplebus1 at simplebus0 [ 1.000000] cpus0 at simplebus0 [ 1.000000] simplebus2 at simplebus0 [ 1.000000] cpu0 at cpus0: 699 MHz Cortex-A9 r2p10 (Cortex V7A core) [ 1.000000] cpu0: DC enabled IC enabled WB enabled LABT branch prediction enabled [ 1.000000] cpu0: L1 32KB/32B 4-way (256 set) VIPT Instruction cache [ 1.000000] cpu0: L1 32KB/32B 4-way (256 set) write-back-locking-C PIPT Data cache [ 1.000000] cpu0: L2 1024KB/32B 16-way (2048 set) write-back-locking-D PIPT Unified cache [ 1.000000] vfp0 at cpu0: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals [ 1.000000] cpufreqdt0 at cpu0 [ 1.000000] cpu1 at cpus0: 699 MHz Cortex-A9 r2p10 (Cortex V7A core) [ 1.000000] cpu1: DC enabled IC enabled WB enabled LABT branch prediction enabled [ 1.000000] cpu1: L1 32KB/32B 4-way (256 set) VIPT Instruction cache [ 1.000000] cpu1: L1 32KB/32B 4-way (256 set) write-back-locking-C PIPT Data cache [ 1.000000] cpu1: L2 1024KB/32B 16-way (2048 set) write-back-locking-D PIPT Unified cache [ 1.000000] vfp1 at cpu1: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals [ 1.000000] simplebus3 at simplebus1 [ 1.000000] simplebus4 at simplebus1 [ 1.000000] simplebus5 at simplebus1 [ 1.000000] simplebus6 at simplebus1 [ 1.000000] simplebus7 at simplebus3 [ 1.000000] simplebus8 at simplebus4 [ 1.000000] simplebus9 at simplebus4 [ 1.000000] simplebus10 at simplebus3 [ 1.000000] simplebus11 at simplebus3 [ 1.000000] simplebus12 at simplebus5 [ 1.000000] simplebus13 at simplebus6 [ 1.000000] simplebus14 at simplebus3 [ 1.000000] simplebus15 at simplebus5 [ 1.000000] simplebus16 at simplebus3 [ 1.000000] simplebus17 at simplebus3 [ 1.000000] simplebus18 at simplebus3 [ 1.000000] simplebus19 at simplebus4 [ 1.000000] gic0 at simplebus0: GIC [ 1.000000] armgic0 at gic0: Generic Interrupt Controller, 160 sources (149 valid) [ 1.000000] armgic0: 16 Priorities, 128 SPIs, 5 PPIs, 16 SGIs [ 1.000000] omapwugen0 at simplebus0 [ 1.000000] l2cc0 at simplebus0 [ 1.000000] arml2cc0 at l2cc0: ARM PL310 r3p1a L2 Cache Controller (disabled) [ 1.000000] arml2cc0: cache enabled [ 1.000000] tisysc0 at simplebus7 [ 1.000000] tisysc1 at simplebus8 [ 1.000000] tisysc2 at simplebus7 [ 1.000000] tisysc3 at simplebus8 [ 1.000000] tisysc4 at simplebus9 [ 1.000000] tisysc5 at simplebus10 [ 1.000000] tisysc6 at simplebus7 [ 1.000000] tisysc7 at simplebus11 [ 1.000000] tisysc8 at simplebus12 [ 1.000000] tisysc9 at simplebus12 [ 1.000000] tisysc10 at simplebus12 [ 1.000000] tisysc11 at simplebus7 [ 1.000000] tisysc12 at simplebus7 [ 1.000000] tisysc13 at simplebus10 [ 1.000000] tisysc14 at simplebus13 [ 1.000000] tisysc15 at simplebus13 [ 1.000000] tisysc16 at simplebus1 [ 1.000000] tisysc17 at simplebus12 [ 1.000000] tisysc18 at simplebus12 [ 1.000000] tisysc19 at simplebus12 [ 1.000000] tisysc20 at simplebus12 [ 1.000000] tisysc21 at simplebus9 [ 1.000000] tisysc22 at simplebus13 [ 1.000000] tisysc23 at simplebus1 [ 1.000000] tisysc24 at simplebus12 [ 1.000000] tisysc25 at simplebus8 [ 1.000000] tisysc26 at simplebus8 [ 1.000000] tisysc27 at simplebus9 [ 1.000000] tisysc28 at simplebus9 [ 1.000000] tisysc29 at simplebus9 [ 1.000000] tisysc30 at simplebus7 [ 1.000000] tisysc31 at simplebus7 [ 1.000000] tisysc32 at simplebus7 [ 1.000000] tisysc33 at simplebus10 [ 1.000000] tisysc34 at simplebus10 [ 1.000000] tisysc35 at simplebus10 [ 1.000000] tisysc36 at simplebus10 [ 1.000000] tisysc37 at simplebus10 [ 1.000000] tisysc38 at simplebus12 [ 1.000000] tisysc39 at simplebus12 [ 1.000000] tisysc40 at simplebus12 [ 1.000000] tisysc41 at simplebus12 [ 1.000000] tisysc42 at simplebus12 [ 1.000000] tisysc43 at simplebus12 [ 1.000000] tisysc44 at simplebus12 [ 1.000000] tisysc45 at simplebus12 [ 1.000000] tisysc46 at simplebus12 [ 1.000000] tisysc47 at simplebus12 [ 1.000000] tisysc48 at simplebus12 [ 1.000000] tisysc49 at simplebus12 [ 1.000000] tisysc50 at simplebus12 [ 1.000000] tisysc51 at simplebus12 [ 1.000000] tisysc52 at simplebus12 [ 1.000000] tisysc53 at simplebus12 [ 1.000000] tisysc54 at simplebus12 [ 1.000000] tisysc55 at simplebus12 [ 1.000000] tisysc56 at simplebus12 [ 1.000000] tisysc57 at simplebus12 [ 1.000000] tisysc58 at simplebus12 [ 1.000000] tisysc59 at simplebus12 [ 1.000000] tisysc60 at simplebus12 [ 1.000000] tisysc61 at simplebus12 [ 1.000000] tisysc62 at simplebus15 [ 1.000000] tisysc63 at simplebus13 [ 1.000000] tisysc64 at simplebus13 [ 1.000000] tisysc65 at simplebus13 [ 1.000000] tisysc66 at simplebus13 [ 1.000000] tisysc67 at simplebus13 [ 1.000000] tisysc68 at simplebus13 [ 1.000000] tisysc69 at simplebus13 [ 1.000000] tisysc70 at simplebus13 [ 1.000000] tisysc71 at simplebus1 [ 1.000000] tisysc72 at simplebus1 [ 1.000000] tisysc73 at simplebus1 [ 1.000000] tisysc74 at simplebus1 [ 1.000000] tisysc75 at simplebus1 [ 1.000000] tisysc76 at simplebus1 [ 1.000000] tisysc77 at simplebus1 [ 1.000000] tisysc78 at simplebus1 [ 1.000000] tisysc79 at simplebus1 [ 1.000000] tisysc80 at simplebus1 [ 1.000000] tisysc81 at simplebus1 [ 1.000000] tisysc82 at simplebus1 [ 1.000000] tisysc83 at simplebus1 [ 1.000000] tisysc84 at simplebus10 [ 1.000000] tisysc85 at simplebus10 [ 1.000000] tisysc86 at simplebus11 [ 1.000000] tisysc87 at simplebus12 [ 1.000000] tisysc88 at simplebus13 [ 1.000000] simplebus20 at tisysc6 [ 1.000000] omap4prcm0 at tisysc0: OMAP44xx PRCM (CM1) [ 1.000000] omap4prcm1 at tisysc1: OMAP44xx PRCM (PRM) [ 1.000000] omap4prcm2 at tisysc2: OMAP44xx PRCM (CM2) [ 1.000000] omap4prcm3 at tisysc3: OMAP44xx PRCM (PRM) [ 1.000000] syscon0 at tisysc7: System Controller Registers [ 1.000000] syscon1 at simplebus20: System Controller Registers [ 1.000000] ffclock0 at omap4prcm0: x1 /2 fixed-factor clock (mpu_periphclk) [ 1.000000] fclock0 at omap4prcm0: 12000000 Hz fixed clock (virt_12000000_ck) [ 1.000000] fclock1 at omap4prcm0: 13000000 Hz fixed clock (virt_13000000_ck) [ 1.000000] fclock2 at omap4prcm0: 16800000 Hz fixed clock (virt_16800000_ck) [ 1.000000] fclock3 at omap4prcm0: 19200000 Hz fixed clock (virt_19200000_ck) [ 1.000000] fclock4 at omap4prcm0: 26000000 Hz fixed clock (virt_26000000_ck) [ 1.000000] fclock5 at omap4prcm0: 27000000 Hz fixed clock (virt_27000000_ck) [ 1.000000] fclock6 at omap4prcm0: 38400000 Hz fixed clock (virt_38400000_ck) [ 1.000000] timuxclk0 at omap4prcm1: TI mux clock (sys_clkin_ck@110) [ 1.000000] fclock7 at omap4prcm0: 32768 Hz fixed clock (sys_32k_ck) [ 1.000000] ffclock1 at omap4prcm0: x1 /16 fixed-factor clock (lp_clk_div_ck) [ 1.000000] tidivclk0 at omap4prcm2: TI divider clock (dpll_per_m4x2_ck@158) [ 1.000000] tidivclk1 at omap4prcm1: TI divider clock (usim_ck@1858) [ 1.000000] timuxclk1 at omap4prcm1: TI mux clock (l4_wkup_clk_mux_ck@108) [ 1.000000] tidivclk2 at omap4prcm1: TI divider clock (div_ts_ck@1888) [ 1.000000] ticompclk0 at omap4prcm0: TI composite clock (dpll_core_m3x2_ck) [ 1.000000] ticompclk1 at omap4prcm2: TI composite clock (dpll_per_m3x2_ck) [ 1.000000] tigateclk0 at omap4prcm3: TI gate clock (auxclk0_src_gate_ck@310) [ 1.000000] timuxclk2 at omap4prcm3: TI mux clock (auxclk0_src_mux_ck@310) [ 1.000000] ticompclk2 at omap4prcm3: TI composite clock (auxclk0_src_ck) [ 1.000000] tigateclk1 at omap4prcm3: TI gate clock (auxclk1_src_gate_ck@314) [ 1.000000] timuxclk3 at omap4prcm3: TI mux clock (auxclk1_src_mux_ck@314) [ 1.000000] ticompclk3 at omap4prcm3: TI composite clock (auxclk1_src_ck) [ 1.000000] tigateclk2 at omap4prcm3: TI gate clock (auxclk2_src_gate_ck@318) [ 1.000000] timuxclk4 at omap4prcm3: TI mux clock (auxclk2_src_mux_ck@318) [ 1.000000] ticompclk4 at omap4prcm3: TI composite clock (auxclk2_src_ck) [ 1.000000] tigateclk3 at omap4prcm3: TI gate clock (auxclk3_src_gate_ck@31c) [ 1.000000] timuxclk5 at omap4prcm3: TI mux clock (auxclk3_src_mux_ck@31c) [ 1.000000] ticompclk5 at omap4prcm3: TI composite clock (auxclk3_src_ck) [ 1.000000] tigateclk4 at omap4prcm3: TI gate clock (auxclk4_src_gate_ck@320) [ 1.000000] timuxclk6 at omap4prcm3: TI mux clock (auxclk4_src_mux_ck@320) [ 1.000000] ticompclk6 at omap4prcm3: TI composite clock (auxclk4_src_ck) [ 1.000000] tigateclk5 at omap4prcm3: TI gate clock (auxclk5_src_gate_ck@324) [ 1.000000] timuxclk7 at omap4prcm3: TI mux clock (auxclk5_src_mux_ck@324) [ 1.000000] ticompclk7 at omap4prcm3: TI composite clock (auxclk5_src_ck) [ 1.000000] tidivclk3 at omap4prcm3: TI divider clock (auxclk0_ck@310) [ 1.000000] tidivclk4 at omap4prcm3: TI divider clock (auxclk1_ck@314) [ 1.000000] tidivclk5 at omap4prcm3: TI divider clock (auxclk2_ck@318) [ 1.000000] tidivclk6 at omap4prcm3: TI divider clock (auxclk3_ck@31c) [ 1.000000] tidivclk7 at omap4prcm3: TI divider clock (auxclk4_ck@320) [ 1.000000] tidivclk8 at omap4prcm3: TI divider clock (auxclk5_ck@324) [ 1.000000] fclock8 at omap4prcm0: 12000000 Hz fixed clock (pad_clks_src_ck) [ 1.000000] fclock9 at omap4prcm0: 12000000 Hz fixed clock (slimbus_src_clk) [ 1.000000] timuxclk8 at omap4prcm1: TI mux clock (abe_dpll_refclk_mux_ck@10c) [ 1.000000] timuxclk9 at omap4prcm1: TI mux clock (abe_dpll_bypass_clk_mux_ck@108) [ 1.000000] tidivclk9 at omap4prcm0: TI divider clock (dpll_abe_m2x2_ck@1f0) [ 1.000000] tidivclk10 at omap4prcm0: TI divider clock (dpll_abe_m3x2_ck@1f4) [ 1.000000] timuxclk10 at omap4prcm0: TI mux clock (core_hsd_byp_clk_mux_ck@12c) [ 1.000000] tidivclk11 at omap4prcm0: TI divider clock (dpll_core_m2_ck@130) [ 1.000000] tidivclk12 at omap4prcm0: TI divider clock (dpll_core_m5x2_ck@13c) [ 1.000000] tidivclk13 at omap4prcm0: TI divider clock (dpll_core_m4x2_ck@138) [ 1.000000] tigateclk6 at omap4prcm0: TI gate clock (dpll_core_m3x2_gate_ck@134) [ 1.000000] tidivclk14 at omap4prcm0: TI divider clock (dpll_core_m3x2_div_ck@134) [ 1.000000] tidivclk15 at omap4prcm0: TI divider clock (div_iva_hs_clk@1dc) [ 1.000000] timuxclk11 at omap4prcm0: TI mux clock (iva_hsd_byp_clk_mux_ck@1ac) [ 1.000000] tidivclk16 at omap4prcm0: TI divider clock (dpll_iva_m4x2_ck@1b8) [ 1.000000] autoconfiguration error: clk: failed to set dpll_iva_m4x2_ck@1b8 rate to 465600000 Hz, error 22 [ 1.000000] tidivclk17 at omap4prcm0: TI divider clock (dpll_iva_m5x2_ck@1bc) [ 1.000000] autoconfiguration error: clk: failed to set dpll_iva_m5x2_ck@1bc rate to 266100000 Hz, error 22 [ 1.000000] tidivclk18 at omap4prcm0: TI divider clock (div_mpu_hs_clk@19c) [ 1.000000] tidivclk19 at omap4prcm0: TI divider clock (div_core_ck@100) [ 1.000000] tidivclk20 at omap4prcm0: TI divider clock (l3_div_ck@100) [ 1.000000] tidivclk21 at omap4prcm0: TI divider clock (dpll_abe_m2_ck@1f0) [ 1.000000] ffclock2 at omap4prcm0: x1 /2 fixed-factor clock (per_hs_clk_div_ck) [ 1.000000] timuxclk12 at omap4prcm2: TI mux clock (per_hsd_byp_clk_mux_ck@14c) [ 1.000000] tigateclk7 at omap4prcm2: TI gate clock (dpll_per_m3x2_gate_ck@154) [ 1.000000] tidivclk22 at omap4prcm2: TI divider clock (dpll_per_m3x2_div_ck@154) [ 1.000000] ffclock3 at omap4prcm0: x1 /3 fixed-factor clock (usb_hs_clk_div_ck) [ 1.000000] tidivclk23 at omap4prcm2: TI divider clock (dpll_per_m6x2_ck@160) [ 1.000000] tidivclk24 at omap4prcm2: TI divider clock (dpll_per_m2x2_ck@150) [ 1.000000] tidivclk25 at omap4prcm2: TI divider clock (dpll_per_m2_ck@150) [ 1.000000] tidivclk26 at omap4prcm2: TI divider clock (dpll_usb_m2_ck@190) [ 1.000000] tidivclk27 at omap4prcm2: TI divider clock (init_60m_fclk@104) [ 1.000000] fclock10 at omap4prcm0: 60000000 Hz fixed clock (xclk60mhsp1_ck) [ 1.000000] fclock11 at omap4prcm0: 60000000 Hz fixed clock (xclk60mhsp2_ck) [ 1.000000] tigateclk8 at omap4prcm2: TI gate clock (usb_phy_cm_clk32k@640) [ 1.000000] tidivclk28 at omap4prcm1: TI divider clock (syc_clk_div_ck@100) [ 1.000000] ffclock4 at omap4prcm1: x1 /1 fixed-factor clock (dbgclk_mux_ck) [ 1.000000] tigateclk9 at omap4prcm1: TI gate clock (usim_fclk@1858) [ 1.000000] tigateclk10 at omap4prcm1: TI gate clock (bandgap_ts_fclk@1888) [ 1.000000] timuxclk13 at omap4prcm3: TI mux clock (auxclkreq0_ck@210) [ 1.000000] timuxclk14 at omap4prcm3: TI mux clock (auxclkreq1_ck@214) [ 1.000000] timuxclk15 at omap4prcm3: TI mux clock (auxclkreq2_ck@218) [ 1.000000] timuxclk16 at omap4prcm3: TI mux clock (auxclkreq3_ck@21c) [ 1.000000] timuxclk17 at omap4prcm3: TI mux clock (auxclkreq4_ck@220) [ 1.000000] timuxclk18 at omap4prcm3: TI mux clock (auxclkreq5_ck@224) [ 1.000000] fclock12 at omap4prcm0: 59000000 Hz fixed clock (extalt_clkin_ck) [ 1.000000] tigateclk11 at omap4prcm0: TI gate clock (pad_clks_ck@108) [ 1.000000] fclock13 at omap4prcm0: 12000000 Hz fixed clock (pad_slimbus_core_clks_ck) [ 1.000000] fclock14 at omap4prcm0: 32768 Hz fixed clock (secure_32k_clk_src_ck) [ 1.000000] tigateclk12 at omap4prcm0: TI gate clock (slimbus_clk@108) [ 1.000000] fclock15 at omap4prcm0: 0 Hz fixed clock (tie_low_clock_ck) [ 1.000000] fclock16 at omap4prcm0: 60000000 Hz fixed clock (utmi_phy_clkout_ck) [ 1.000000] fclock17 at omap4prcm0: 60000000 Hz fixed clock (xclk60motg_ck) [ 1.000000] ffclock5 at omap4prcm0: x1 /8 fixed-factor clock (abe_24m_fclk) [ 1.000000] tidivclk29 at omap4prcm0: TI divider clock (abe_clk@108) [ 1.000000] tidivclk30 at omap4prcm0: TI divider clock (dpll_core_m6x2_ck@140) [ 1.000000] ffclock6 at omap4prcm0: x1 /2 fixed-factor clock (ddrphy_ck) [ 1.000000] ffclock7 at omap4prcm0: x1 /2 fixed-factor clock (dll_clk_div_ck) [ 1.000000] tidivclk31 at omap4prcm0: TI divider clock (dpll_core_m7x2_ck@144) [ 1.000000] tidivclk32 at omap4prcm0: TI divider clock (dpll_mpu_m2_ck@170) [ 1.000000] tidivclk33 at omap4prcm0: TI divider clock (l4_div_ck@100) [ 1.000000] tidivclk34 at omap4prcm0: TI divider clock (ocp_abe_iclk@528) [ 1.000000] ffclock8 at omap4prcm0: x1 /4 fixed-factor clock (per_abe_24m_fclk) [ 1.000000] fclock18 at omap4prcm0: 0 Hz fixed clock (dummy_ck) [ 1.000000] tidivclk35 at omap4prcm2: TI divider clock (dpll_per_m5x2_ck@15c) [ 1.000000] tidivclk36 at omap4prcm2: TI divider clock (dpll_per_m7x2_ck@164) [ 1.000000] timuxclk19 at omap4prcm2: TI mux clock (ducati_clk_mux_ck@100) [ 1.000000] ffclock9 at omap4prcm2: x1 /16 fixed-factor clock (func_12m_fclk) [ 1.000000] ffclock10 at omap4prcm2: x1 /4 fixed-factor clock (func_24m_clk) [ 1.000000] ffclock11 at omap4prcm2: x1 /8 fixed-factor clock (func_24mc_fclk) [ 1.000000] tidivclk37 at omap4prcm2: TI divider clock (func_48m_fclk@108) [ 1.000000] ffclock12 at omap4prcm2: x1 /4 fixed-factor clock (func_48mc_fclk) [ 1.000000] tidivclk38 at omap4prcm2: TI divider clock (func_64m_fclk@108) [ 1.000000] tidivclk39 at omap4prcm2: TI divider clock (func_96m_fclk@108) [ 1.000000] tidivclk40 at omap4prcm2: TI divider clock (per_abe_nc_fclk@108) [ 1.000000] tidpllclk0 at omap4prcm0: TI DPLL clock (dpll_mpu_ck@160) [ 1.000000] pinctrl0 at tisysc4 [ 1.000000] tidpllclk1 at omap4prcm0: TI DPLL clock (dpll_abe_ck@1e0) [ 1.000000] tidpllclk2 at omap4prcm0: TI DPLL clock (dpll_abe_x2_ck@1f0) [ 1.000000] tidpllclk3 at omap4prcm0: TI DPLL clock (dpll_core_ck@120) [ 1.000000] tidpllclk4 at omap4prcm0: TI DPLL clock (dpll_core_x2_ck) [ 1.000000] tidpllclk5 at omap4prcm0: TI DPLL clock (dpll_iva_ck@1a0) [ 1.000000] tidpllclk6 at omap4prcm0: TI DPLL clock (dpll_iva_x2_ck) [ 1.000000] tidpllclk7 at omap4prcm2: TI DPLL clock (dpll_per_ck@140) [ 1.000000] tidpllclk8 at omap4prcm2: TI DPLL clock (dpll_per_x2_ck@150) [ 1.000000] pinctrl1 at tisysc7 [ 1.000000] tigpio0 at tisysc8: GPIO (gpio@48055000) [ 1.000000] gpio0 at tigpio0: 32 pins [ 1.000000] tigpio0: interrupting on GIC irq 62 [ 1.000000] tigpio1 at tisysc10: GPIO (gpio@48059000) [ 1.000000] gpio1 at tigpio1: 32 pins [ 1.000000] tigpio1: interrupting on GIC irq 64 [ 1.000000] tigpio2 at tisysc20: GPIO (gpio@48057000) [ 1.000000] gpio2 at tigpio2: 32 pins [ 1.000000] tigpio2: interrupting on GIC irq 63 [ 1.000000] tigpio3 at tisysc21: GPIO (gpio@4a310000) [ 1.000000] gpio3 at tigpio3: 32 pins [ 1.000000] tigpio3: interrupting on GIC irq 61 [ 1.000000] tigpio4 at tisysc41: GPIO (gpio@4805b000) [ 1.000000] gpio4 at tigpio4: 32 pins [ 1.000000] tigpio4: interrupting on GIC irq 65 [ 1.000000] tigpio5 at tisysc42: GPIO (gpio@4805d000) [ 1.000000] gpio5 at tigpio5: 32 pins [ 1.000000] tigpio5: interrupting on GIC irq 66 [ 1.000000] a9ptmr0 at simplebus0 [ 1.000000] a9ptmr0: interrupting on GIC irq 29 [ 1.000000] arma9ptmr0 at a9ptmr0: A9 Private Timer (174 MHz) [ 1.000000] tiiic0 at tisysc9: I2C controller (i2c@48070000), 16-bytes FIFO [ 1.000000] iic0 at tiiic0: I2C bus [ 1.000000] twl0 at iic0 addr 0x48: TWL4030, RTC, IDCODE 0x00000000 [ 1.000000] twl1 at iic0 addr 0x4b: TWL4030twl1: autoconfiguration error: error reading reg 0x85: 5 [ 1.000000] twl1: autoconfiguration error: error reading reg 0x86: 5 [ 1.000000] twl1: autoconfiguration error: error reading reg 0x87: 5 [ 1.000000] twl1: autoconfiguration error: error reading reg 0x88: 5 [ 1.000000] , IDCODE 0x00000000 [ 1.000000] connector0 at simplebus0: DVI connector [ 1.000000] tiiic1 at tisysc24: I2C controller (i2c@48060000), 16-bytes FIFO [ 1.000000] iic1 at tiiic1: I2C bus [ 1.000000] eeprom (ti,eeprom) at iic1 addr 0x50 not configured [ 1.000000] connector1 at simplebus0: HDMI connector [ 1.000000] com0 at tisysc38: OMAP UART, 64-byte FIFO [ 1.000000] com0: console [ 1.000000] com0: interrupting on GIC irq 106 [ 1.000000] com1 at tisysc43: OMAP UART, 64-byte FIFO [ 1.000000] com1: interrupting on GIC irq 104 [ 1.000000] com2 at tisysc44: OMAP UART, 64-byte FIFO [ 1.000000] com2: interrupting on GIC irq 105 [ 1.000000] com3 at tisysc45: OMAP UART, 64-byte FIFO [ 1.000000] com3: interrupting on GIC irq 102 [ 1.000000] tiiic2 at tisysc46: I2C controller (i2c@48072000), 16-bytes FIFO [ 1.000000] iic2 at tiiic2: I2C bus [ 1.000000] tiiic3 at tisysc62: I2C controller (i2c@48350000), 16-bytes FIFO [ 1.000000] iic3 at tiiic3: I2C bus [ 1.000000] fregulator0 at simplebus0: vwl1271 [ 1.000000] fregulator1 at simplebus0: hsusb1_vbus [ 1.000000] tiusbtll0 at tisysc31: OMAP HS USB Host TLL [ 1.000000] usbnopphy0 at simplebus0: USB PHY [ 1.000000] tiusb0 at tisysc32: OMAP HS USB Host [ 1.000000] /ocp/interconnect@4a300000/segment@0/target-module@6000/prm@0/clocks/trace_clk_div_ck at omap4prcm1 not configured [ 1.000000] /ocp/interconnect@4a000000/segment@0/target-module@8000/cm2@0/clocks/dpll_usb_ck@180 at omap4prcm2 not configured [ 1.000000] /ocp/interconnect@4a000000/segment@80000/target-module@2d000/ocp2scp@0 at tisysc5 not configured [ 1.000000] /ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/control-phy@33c at simplebus20 not configured [ 1.000000] /ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/control-phy@300 at simplebus20 not configured [ 1.000000] /ocp/interconnect@4a000000/segment@0/target-module@56000/dma-controller@0 at tisysc11 not configured [ 1.000000] /ocp/interconnect@4a000000/segment@100000/target-module@0/omap4_padconf_global@5a0/pbias_regulator@60 at syscon0 not configured [ 1.000000] /sram@40304000 at simplebus0 not configured [ 1.000000] /lpddr2 at simplebus0 not configured [ 1.000000] /ocp/interconnect@4a000000/segment@0/target-module@66000/mmu@0 at tisysc12 not configured [ 1.000000] /ocp/interconnect@4a000000/segment@80000/target-module@74000/mailbox@0 at tisysc13 not configured [ 1.000000] omaptimer0 at tisysc14: Timer [ 1.000000] omaptimer1 at tisysc15: Timer [ 1.000000] timecounter: Timecounter "omaptimer1" frequency 24000000 Hz quality 200 [ 1.000004] /ocp/target-module@55082000/mmu@0 at tisysc16 not configured [ 1.000004] omaptimer2 at tisysc17: Timer [ 1.000004] omaptimer3 at tisysc18: Timer [ 1.000004] omaptimer4 at tisysc19: Timer [ 1.000004] /encoder1 at simplebus0 not configured [ 1.000004] /encoder0 at simplebus0 not configured [ 1.000004] /ocp/bandgap@4a002260 at simplebus1 not configured [ 1.000004] /ocp/interconnect@40100000/segment@0/target-module@32000/mcpdm@0 at tisysc22 not configured [ 1.000004] /ocp/target-module@58000000/dss@0 at tisysc23 not configured [ 1.000004] /ocp/interconnect@4a300000/segment@0/target-module@4000/counter@0 at tisysc25 not configured [ 1.000004] /ocp/interconnect@4a300000/segment@0/target-module@c000/scm@c000 at tisysc26 not configured [ 1.000004] tiwdt0 at tisysc27: WATCHDOG [ 1.000004] omaptimer5 at tisysc28: Timer [ 1.000004] /ocp/interconnect@4a300000/segment@10000/target-module@c000/keypad@0 at tisysc29 not configured [ 1.000004] /ocp/interconnect@4a000000/segment@0/target-module@8000/cm2@0/clocks/dpll_usb_clkdcoldo_ck@1b4 at omap4prcm2 not configured [ 1.000004] /ocp/interconnect@4a000000/segment@0/target-module@58000/hsi@0 at tisysc30 not configured [ 1.000004] /ocp/interconnect@4a000000/segment@0/target-module@64000/usbhshost@0/ohci@800 at tiusb0 not configured [ 1.000004] ehci0 at tiusb0: EHCI [ 1.000004] ehci0: interrupting on GIC irq 109 [ 1.000004] ehci0: EHCI version 1.0 [ 1.000004] ehci0: 1 companion controller, 3 ports [ 1.000004] usb0 at ehci0: USB revision 2.0 [ 1.000004] motg0 at tisysc33: USB OTG [ 1.000004] motg0: interrupting on GIC irq 124 [ 1.000004] motg0: Dynamic FIFO sizing detected, assuming 16Kbytes of FIFO RAM [ 1.000004] usb1 at motg0: USB revision 2.0 [ 1.000004] /ocp/interconnect@4a000000/segment@80000/target-module@59000/smartreflex@0 at tisysc34 not configured [ 1.000004] /ocp/interconnect@4a000000/segment@80000/target-module@5b000/smartreflex@0 at tisysc35 not configured [ 1.000004] /ocp/interconnect@4a000000/segment@80000/target-module@5d000/smartreflex@0 at tisysc36 not configured [ 1.000004] /ocp/interconnect@4a000000/segment@80000/target-module@76000/spinlock@0 at tisysc37 not configured [ 1.000004] omaptimer6 at tisysc39: Timer [ 1.000004] omaptimer7 at tisysc40: Timer [ 1.000004] omaptimer8 at tisysc48: Timer [ 1.000004] tirng0 at tisysc49autoconfiguration error: : couldn't enable module [ 1.000004] /ocp/interconnect@48000000/segment@0/target-module@98000/spi@0 at tisysc51 not configured [ 1.000004] /ocp/interconnect@48000000/segment@0/target-module@9a000/spi@0 at tisysc52 not configured [ 1.000004] sdhc0 at tisysc53: MMCHS [ 1.000004] sdhc0: interrupting on GIC irq 115 [ 1.000004] sdhc0: SDHC 2.0, rev 49, caps <07e90080/00000000>, PIO, 96000 kHz, HS 1.8V 3.0V 3.3V, 1024 byte blocks [ 1.000004] sdmmc0 at sdhc0 slot 0 [ 1.000004] /ocp/interconnect@48000000/segment@0/target-module@a5000/des@0 at tisysc54 not configured [ 1.000004] /ocp/interconnect@48000000/segment@0/target-module@b2000/1w@0 at tisysc56 not configured [ 1.000004] /ocp/interconnect@48000000/segment@0/target-module@b8000/spi@0 at tisysc58 not configured [ 1.000004] /ocp/interconnect@48000000/segment@0/target-module@ba000/spi@0 at tisysc59 not configured [ 1.000004] sdhc1 at tisysc61: MMCHS [ 1.000004] sdhc1: interrupting on GIC irq 91 [ 1.000004] sdhc1: SDHC 2.0, rev 49, caps <04e10080/00000000>, PIO, 96000 kHz, HS 1.8V, 1024 byte blocks [ 1.000004] sdmmc1 at sdhc1 slot 0 [ 1.000004] /ocp/interconnect@40100000/segment@0/target-module@22000/mcbsp@0 at tisysc63 not configured [ 1.000004] tiwdt1 at tisysc68autoconfiguration error: : couldn't enable hwmod [ 1.000004] omaptimer9 at tisysc69: Timer [ 1.000004] omaptimer10 at tisysc70: Timer [ 1.000004] /ocp/target-module@50000000/gpmc@50000000 at tisysc71 not configured [ 1.000004] armpmu0 at tisysc72: Performance Monitor Unit [ 1.000004] /ocp/target-module@4c000000/emif@0 at tisysc73 not configured [ 1.000004] /ocp/target-module@4d000000/emif@0 at tisysc74 not configured [ 1.000004] /ocp/dsp at simplebus1 not configured [ 1.000004] /ocp/ipu@55020000 at simplebus1 not configured [ 1.000004] /ocp/target-module@4b501000/aes@0 at tisysc75 not configured [ 1.000004] /ocp/target-module@4b701000/aes@0 at tisysc76 not configured [ 1.000004] /ocp/target-module@4b100000/sham@0 at tisysc77 not configured [ 1.000004] /ocp/regulator-abb-mpu at simplebus1 not configured [ 1.000004] /ocp/regulator-abb-iva at simplebus1 not configured [ 1.000004] gpioleds0 at simplebus0: pandaboard::status1 pandaboard::status2 [ 1.000004] gpiokeys0 at simplebus0: button S2 [ 1.000004] /sound at simplebus0 not configured [ 1.000004] /ocp/l3-noc@44000000 at simplebus1 not configured [ 1.000004] /ocp/target-module@5a000000/iva at tisysc79 not configured [ 1.000004] /ocp/target-module@48210000/mpu at tisysc80 not configured [ 1.000004] /ocp/target-module@4e000000/dmm@0 at tisysc83 not configured [ 1.661914] WARNING: system needs entropy for security; see entropy(7) [ 1.672508] timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0 [ 1.672508] cpufreqdt0: rate: 350.000 MHz, 1025000 uV [ 1.759308] uhub0 at usb0: NetBSD (0x0000) EHCI root hub (0x0000), class 9/0, rev 2.00/1.00, addr 1 [ 1.775332] uhub0: 3 ports with 3 removable, self powered [ 1.791347] uhub1 at usb1: NetBSD (0x0000) MOTG root hub (0x0000), class 9/0, rev 2.00/1.00, addr 1 [ 1.818432] uhub1: 1 port with 1 removable, self powered [ 1.853632] armpmu0: interrupting on GIC irq 86 [ 1.892032] armpmu0: interrupting on GIC irq 87 [ 2.472444] IPsec: Initialized Security Association Processing. [ 2.487231] sdmmc1: autoconfiguration error: couldn't enable card: 60 [ 2.560834] sdmmc0: SD card status: 4-bit, C10 [ 2.570445] ld0 at sdmmc0: <0x03:0x5344:SU16G:0x80:0x1bec8779:0x0c8> [ 2.580518] ld0: 15193 MB, 7717 cyl, 64 head, 63 sec, 512 bytes/sect x 31116288 sectors [ 2.599251] ld0: 4-bit width, High-Speed/SDR25, 50.000 MHz [ 2.695246] uhub2 at uhub0 port 1: vendor 0424 (0x0424) product 9514 (0x9514), class 9/0, rev 2.00/2.00, addr 2 [ 2.711948] uhub2: multiple transaction translators [ 2.720837] uhub2: 5 ports with 4 removable, self powered [ 3.031231] usmsc0 at uhub2 port 1 [ 3.038225] usmsc0: vendor 0424 (0x0424) product ec00 (0xec00), rev 2.00/2.00, addr 3 [ 3.063239] smscphy0 at usmsc0 phy 1: SMSC LAN8700 10/100 Ethernet Transceiver, rev. 3 [ 3.082437] smscphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto [ 3.092656] usmsc0: Ethernet address [_MAC_XXXXXXXXXX] [ 3.102447] autoconfiguration error: The multicast bit is set in the MAC address. It's wrong. [ 3.120836] swwdog0: software watchdog initialized [ 3.149654] WARNING: 10 errors while detecting hardware; check system log. [ 3.159229] boot device: ld0 [ 3.168831] root on ld0a dumps on ld0b [ 3.185421] root file system type: ffs [ 3.200052] kern.module.path=/stand/evbarm/11.99.3/modules [ 3.293632] twl0: autoconfiguration error: error reading reg 0x1f: 5 [ 3.383232] twl0: autoconfiguration error: error reading reg 0x20: 5 [ 3.472832] twl0: autoconfiguration error: error reading reg 0x21: 5 [ 3.562432] twl0: autoconfiguration error: error reading reg 0x22: 5 [ 3.570013] WARNING: preposterous TOD clock time [ 3.577409] WARNING: using filesystem time [ 3.583988] WARNING: CHECK AND RESET THE DATE! [ 4.068038] entropy: best effort