Launched in 2004, dmesgd aims to provide a user-submitted repository of searchable *BSD dmesgs. The dmesg(8) command displays the system message buffer's content, and during boot a copy is saved to /var/run/dmesg.boot. This buffer contains the operating system release, name and version, a list of devices identified, plus a whole host of other useful information. We hope others find this resource useful and further contribute to its growth. Contact us at [ admin at lists dot nycbug dot org ]. Note that this site is not a substitute for sending the dmesg directly to the respective project.

Date: 2025-10-16 21:58:19
From: afresh1
Description: OpenBSD 7.8 (GENERIC.MP) arm64 on raspberrypi Raspberry Pi 3 Model B Rev 1.2
OpenBSD 7.8 (GENERIC.MP) #38: Sun Oct 12 18:23:44 MDT 2025
    [_EMAIL_XXXXXXXXXXXXXXXX]:/usr/src/sys/arch/arm64/compile/GENERIC.MP
real mem  = 992460800 (946MB)
avail mem = 921378816 (878MB)
random: good seed from bootblocks
mainbus0 at root: Raspberry Pi 3 Model B Rev 1.2
efi0 at mainbus0: UEFI 2.11
efi0: Das U-Boot rev 0x20250700
smbios0 at efi0: SMBIOS 3.7.0
smbios0: vendor U-Boot version "2025.07" date 07/01/2025
smbios0: raspberrypi Raspberry Pi 3 Model B Rev 1.2
cpu0 at mainbus0 mpidr 0: ARM Cortex-A53 r0p4
cpu0: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
cpu0: 512KB 64b/line 16-way L2 cache
cpu0: CRC32,ASID16
cpu1 at mainbus0 mpidr 1: ARM Cortex-A53 r0p4
cpu1: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
cpu1: 512KB 64b/line 16-way L2 cache
cpu2 at mainbus0 mpidr 2: ARM Cortex-A53 r0p4
cpu2: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
cpu2: 512KB 64b/line 16-way L2 cache
cpu3 at mainbus0 mpidr 3: ARM Cortex-A53 r0p4
cpu3: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
cpu3: 512KB 64b/line 16-way L2 cache
"linux,cma" at mainbus0 not configured
apm0 at mainbus0
simplefb0 at mainbus0: 656x416, 32bpp
wsdisplay0 at simplefb0 mux 1
wsdisplay0: screen 0-5 added (std, vt100 emulation)
"system" at mainbus0 not configured
"axi" at mainbus0 not configured
simplebus0 at mainbus0: "soc"
bcmclock0 at simplebus0
bcmmbox0 at simplebus0
bcmgpio0 at simplebus0
bcmaux0 at simplebus0
bcmdmac0 at simplebus0: DMA0 DMA2 DMA4 DMA5 DMA8 DMA9 DMA10 DMA11
bcmintc0 at simplebus0
pluart0 at simplebus0: rev 2, 16 byte fifo
pluart0: console
bcmsdhost0 at simplebus0: 250 MHz base clock
sdmmc0 at bcmsdhost0: 4-bit, sd high-speed, mmc high-speed, dma
dwctwo0 at simplebus0
bcmdog0 at simplebus0
bcmrng0 at simplebus0
bcmtemp0 at simplebus0
"interrupt-controller" at simplebus0 not configured
sdhc0 at simplebus0
sdhc0: SDHC 3.00, 200 MHz base clock
sdmmc1 at sdhc0: 4-bit, sd high-speed, mmc high-speed
"firmware" at simplebus0 not configured
"power" at simplebus0 not configured
"mailbox" at simplebus0 not configured
"gpiomem" at simplebus0 not configured
"fb" at simplebus0 not configured
simplebus1 at simplebus0: "nvmem"
"nvmem_otp" at simplebus1 not configured
"nvmem_cust" at simplebus1 not configured
simplebus2 at mainbus0: "clocks"
"clk-osc" at simplebus2 not configured
"clk-usb" at simplebus2 not configured
"phy" at mainbus0 not configured
"arm-pmu" at mainbus0 not configured
agtimer0 at mainbus0: 19200 kHz
"cam1_regulator" at mainbus0 not configured
"cam_dummy_reg" at mainbus0 not configured
"fixedregulator_3v3" at mainbus0 not configured
"fixedregulator_5v0" at mainbus0 not configured
gpioleds0 at mainbus0: "ACT", "PWR"
usb0 at dwctwo0: USB revision 2.0
uhub0 at usb0 configuration 1 interface 0 "Broadcom DWC2 root hub" rev 2.00/1.00 addr 1
scsibus0 at sdmmc0: 2 targets, initiator 0
sd0 at scsibus0 targ 1 lun 0: <SD/MMC, JB1RT, 0030> removable
sd0: 30528MB, 512 bytes/sector, 62521344 sectors
uhub1 at uhub0 port 1 configuration 1 interface 0 "Standard Microsystems product 0x9514" rev 2.00/2.00 addr 2
bwfm0 at sdmmc1 function 1
manufacturer 0x02d0, product 0xa9a6 at sdmmc1 function 2 not configured
smsc0 at uhub1 port 1 configuration 1 interface 0 "Standard Microsystems SMSC9512/14" rev 2.00/2.00 addr 3
smsc0: address [_MAC_XXXXXXXXXX]
ukphy0 at smsc0 phy 1: Generic IEEE 802.3u media interface, rev. 3: OUI 0x0001f0, model 0x000c
vscsi0 at root
scsibus1 at vscsi0: 256 targets
softraid0 at root
scsibus2 at softraid0: 256 targets
root on sd0a (88dd4558238592e5.a) swap on sd0b dump on sd0b
WARNING: CHECK AND RESET THE DATE!
gpio0 at bcmgpio0: 54 pins
bwfm0: address [_MAC_XXXXXXXXXX]